For the gate oxide region, we investigate the impact on device performance of introducing a high dielectric constant (high-k) oxide instead of silicon dioxide (SiO2). By increasing the k-value with the use of an alternative high-k gate oxide, the capacitance per unit area can be increased and this improves the performance of the device.
Alternative high-k materials investigated by the group through atomic layer deposition (ALD) and electron beam evaporation (e-beam) are Al2O3 (k ~ 8-9), HfO2 (k ~ 16-25), ZrO2 (k ~ 16-35), and their silicate compounds. Since the gate oxide must form a good quality interface with the underlying semiconductor and the metal gate contacts on top, surface treatments or interface control layers are often required.
Bandgap engineering is also needed to ensure unwanted leakage effects are minimised and that the devices can be easily modulated. As the k-value of an oxide material increases it is generally found that the bandgap of the material will reduce, and as a result leakage will increase if no measures are taken to improve the bandgap and the MOS band offsets. Finding an optimum bandgap for the required high k-value, with good band offsets, good quality interfaces, and all for the scaled oxide thickness requirements to ensure good field-effect modulation at the low voltage specifications required, are the main objectives of this research.